Sunday 15 November 2015

Geography of Silicon Chip


The making of silicon chips is a Light Industry. This means the products a small light and easily transported.
The inputs processes and outputs of the creation of the silicon chip is:

Inputs                                                                           
Silica Sand
Copper
Hydrofluoric acid
Nitric acid

Processes 
Heating in Furnaces 
Fractional Distillation
Czochralski
Wire Saw 
CVD
Chemical Mechanical Polishing

Outputs
Silicon Chip
Broken Silicon Chips

That is only to name a few inputs processes and outputs of make the silicon chips.
FABs is the name given to the clean room facility that make the silicon due to tiny dirty particles destroying silicon chips. An example of these FABs is in Leixlip in County Kildare Ireland. Sit for Fabs are specially pick for flat stable ground and good transport to receive and transport goods and resource. These sit can cost Billions to build and run.
Silicon Chip are use all over the world in many devices from computer to even toys we use them every day but you now know how they are made.


Earth Matters Folens by Eddie Guilmartin and Edwina Hynes

Saturday 14 November 2015


Finishing the Chip

Now a gate is add to the silicon. A gate is a thin layer of silicon oxide which acts as an insulator. The first part is put between the source and the drain. This is accomplished by chemical vapour deposition (CVD). CVD is done by filling a furnace with gases so a chemical reaction takes place on the surface of the silicon. Next a layer of conductive silicon is put over the silicon oxide layer. CVD is use for this as well.
Billions of MOSFETs put on the wafer but now they need to be connected. Fist we must insulate the silicon with a layer of silicon dioxide by CVD. Now that the surface is insulated can't make connection to the Source, Drain or Gate. To remake the connection they use a method called double damascene. Need to make tungsten connecting pin and copper interconnect. Hydrofluoric acid etches holes into the silicon dioxide through photoresist. Next the interconnection tracks are etched in. A top layer of copper is electroplated on. It fills the holes to make connections in the MOSFETs. The pins through the insulating layer are called vias. Now the top layer of copper is removed using chemical mechanical polishing. The pin pins in the tracks are left. A final insulating layer of silicon dioxide is connected using the vias.
The wafer has hundreds of chip on it and they have to be checked if they are working or not.

This is done with a wafer probe. Uses pins that touch the contact of the chip and pass electrical signals. Sometimes if part of the chip does not work it is sold as a lower end chip.
Finally the chips are cut out and pack and sent off.
I referenced

Intel Museum website

Tech Radar


Sunday 1 November 2015

Making the Circuit



Now that we have a silicon wafer we have to put the circuit on the wafer. The circuit is tiny and use very precise methods to put the advance circuits on the chip.

First the wafer is heated the silicon reacts with the oxygen to make silicon dioxide layer. Then a layer photoresist and is spun in vacuum and then dried the spinning is done so the layer is even. The wafer is then exposed to ultraviolet light through a photographic mask. The mask is used to block the light to make the circuit on the silicon this step is repeated for each chip on the wafer. Different masks are use to build up different layers. The wafer is the developed in a alkaline solution then area exposed the ultraviolet light on the photoresist is washed away. Hydrofluoric acid is used to dissolve the silicon oxide where the photoresist was washed away.

Now that the circuit is put on it is time to add the transistor to the processor it is called MOSFET. 
There are two types of MOSFET P-channel made of p type materials and n-channel made n type material. 
First they must create a P type and n type areas on the circuit.
The wafer has a beam of boron ions they implant themselves into the silicon in the gaps in the photoresist called p wells which will be use in the n channel MOSFET. A different photoresist pattern is now applied to make n well for p channel. Yet anther photoresist beam is use to create the n type region in the p well this will act as the source and drain of the n channel. Next a layer of silicon germanium doped with boron is applied.